FAQS about Inverter front stage and power relationship

What is an inverter stage?

The inverter stage is a basic building block for digital logic circuits and memory cells. A generic inverter stage is illustrated below on the left. It consists of two devices,

What is an Inverting buck-boost power stage?

The inverting buck-boost is a popular non-isolated, inverting power stage topology. Power supply designers choose the inverting buck-boost power stage because the output voltage is inverted from the input voltage, and the output voltage can be either higher or lower than the input voltage.

What are the features of a given inverter design?

We can identify six features of a given inverter design which we can use to evaluate it and compare it to other designs. They are: The logic levels are found by insisting that VHI and VLO are such that VHI applied to the input of an inverter results in an output of VLO, and that VLO applied to the input of an inverter results in an output of VHI.

What is a generic inverter stage?

A generic inverter stage is illustrated below on the left. It consists of two devices, pull-up device, which is typically either a bipolar junction transistor or an enhancement mode field effect transistor, and a pull-down device, which might be another transistor, or a resistor, current source, diode, etc.

What determines the output voltage ripple of an Inverting buck-boost power stage?

The value of the output capacitance of an inverting buck-boost power stage is generally selected to limit the output voltage ripple to the level required by the specification. The series impedance of the capacitor and the power stage output current determine the output voltage ripple.

How to choose a suitable inverter?

With the thermal impedance information of the thermal system design, the proper device rating can be selected. The 1200-V/75-mΩ SiC MOSFET and 650-V/60-mΩ SiC MOSFET is a good tradeoff among thermal, efficiency and cost. The primary source of lost efficiency in any inverter is going to be a result of the losses incurred in the switching devices.